CX74063-36芯片解密研究

來(lái)源：IC解密-耐斯迪   時(shí)間：2012-4-25   閱讀：210次
耐斯迪解密事業(yè)部專(zhuān)業(yè)承接CX74063-36芯片解密項(xiàng)目合作，針對(duì)各類(lèi)型IC芯片以及疑難解密芯片，我們長(zhǎng)期進(jìn)行專(zhuān)門(mén)技術(shù)攻關(guān)，目前在多個(gè)研究領(lǐng)域均擁有系列研究成果，能夠提供多達(dá)近五十余廠家的數(shù)萬(wàn)種型號(hào)的IC解密服務(wù)。
FEATURES
·Direct down-conversion receiver eliminates the external image reject/IF filters
·Three separate LNAs with single-ended inputs
·RF gain range: GSM = 20 dB, DCS = 22 dB,PCS = 20 dB. Baseband gain range = 100 dB
·Gain selectable in 2 dB steps
·Integrated receive baseband filters with tunable bandwidth
·Integrated DC offset correction sequencer
·Reduced filtering requirements with translational loop transmit architecture
·Integrated transmit VCOs
·Wide RF range for quad band operation
·Integrated PAC loop
·Single integrated, fully programmable fractional-N synthesizer suitable for multi-slot GPRS operation
·Fully integrated wideband Ultra High Frequency (UHF) VCO
·Integrated crystal oscillator
·Separate enable lines for power management transmit,receive, and synthesizer modes
·Supply voltage down to 2.6 V
·Band select and front-end enable states may be exercised on output pins to control external circuitry.
·Low external component count
·Optional bypass of baseband filtering for use with high dynamic range Analog to Digital Converters (ADCs) for current savings
·Interfaces to low dynamic range ADC
·Meets AM suppression requirements without baseband interaction.
·56-pin RFLGA 8x8 mm package (low temperature option,CX74063-34; high temperature option, CX74063-35 and CX74063-36)
·Low power standby mode